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Tested on EarthTrusted in Orbit

A new standard for radiation reliability testing.

SK-RAFT injects radiation-induced bit flips into real FPGAs, right from your desk.

LEO → GEOSatellites & space systems
Aviation altitudeAircraft & avionics
On the roadAutomotive
On the groundData centers
Why it matters

One bit flips. Your design changes.

Radiation from space can flip a bit inside a chip: a 0 becomes a 1. Nothing breaks and nothing warns you.

In SRAM-based FPGAs the configuration memory is the circuit itself. One upset can quietly rewire part of your design and stay there until it is detected and repaired.

Radiation beam testing remains essential, but beam time is scarce and very expensive. Find which bits affect your design early and keep it to a minimum.

Inside the FPGACircuit open
How one bit flip cuts a connection Logic A sends a signal to logic B through a switch inside the chip. One configuration bit, set to 0, keeps the switch closed. A particle flips the bit to 1, the switch opens and logic B no longer receives the signal. LOGICA LOGICB 1 CONFIG BIT switch open ✕ no signal

Circuit open. The switch opens and the connection is cut. Logic B gets nothing, and the chip gives no warning.

Where bit flips happen

The higher you go, the less Earth protects you.

The atmosphere and Earth's magnetic field hold most particles back, but not all. Bit flips happen on the ground, more often at aviation altitude, and far more often in orbit. That affects data centers, cars, aircraft and satellites alike.

Particles from the Sun travel towards Earth, which is wrapped in its magnetic field, with a satellite in orbit
Not to scale
  1. Deep spacebeyond the magnetic field

    No protection from Earth at all.

  2. GEO · LEO36,000 km · 400 km

    Far more bit flips in orbit, for every satellite that has to keep working for years.

  3. Aviation≈ 11 km

    Less atmosphere above the aircraft means more bit flips in its avionics.

  4. Ground0 km

    Neutrons reach the ground too. Bit flips happen in data centers and in cars.

The bars show how much the atmosphere and Earth's magnetic field protect each altitude.

The radiation lab, on your desk.

SK-RAFT is an FPGA-in-the-loop EDA tool. It injects the same bit flips that radiation causes, straight into your design, so you can find the bits that matter, prove your mitigation works, and make your design more reliable.

How SK-RAFT works
All the memories

We flip bits in every memory of the chip.

The configuration memory holds the design. The application memories hold the data while it runs: flip-flops, BRAM and LUTRAM. Many tools only flip bits in the configuration memory. SK-RAFT does both.

Only where it matters

We aim at the bits that can break your design.

SK-RAFT can flip only the essential bits, or only the bits in one area of the chip (a Pblock) or in one component of your design. That saves a lot of test time.

Live response

We talk to your design while we test.

Over the same USB cable (JTAG), SK-RAFT sends inputs to your design and reads its outputs. You see the effect of each bit flip at once.

Your setup

It fits the test setup you already have.

Control SK-RAFT with Python API scripts. Other languages can be supported through its gRPC interface. No hardware modification and no change to your design.

Supported devices

Runs on AMD-Xilinx FPGAs today.

  • 7-SeriesSupported
  • Zynq-7000Supported
  • UltraScale+Supported
  • Zynq UltraScale+Supported
  • VersalComing next
Why SK-RAFT

Side by side, the difference is clear.

SK-RAFT compared with typical FPGA fault-injection tools
Typical toolsSK-RAFT
Configuration memorythe circuit itselfYesYes
Flip-flops, BRAM, LUTRAMthe data while it runsRarelyAll of them
Only the bits that matteressential bits, one area, one componentSometimesAll three
Talk to your designinputs in, outputs out, during the testExtra setupSame USB cable
Changes to your designto run a campaignOften extra IPNone
Automationfits your test setupTool-specificPython API · gRPC

Typical tools: common FPGA fault-injection approaches as publicly documented. Want a comparison with a specific tool? Ask us.

In our lab

Real boards. Real campaigns.

This is where SK-RAFT is built and used: fault-injection campaigns on AMD-Xilinx development boards, in our lab.

An engineer studies an implemented FPGA design in Vivado
A design under testThe implemented design in Vivado, with an SK-RAFT campaign running alongside it.
Console output listing essential bits and the vulnerability factor of each design
Results while it runsEssential bits and vulnerability factor, per design.
AMD-Xilinx development boards on the lab bench in front of two monitors
Boards on the benchEach one connected over JTAG.
Two SOLIDKOSMOS engineers at the bench
Reading the resultsOur engineers review a campaign.
An engineer writing a test script
Scripting a campaignPython scripts against the SK-RAFT API.
Track record

Proven in the beam, not only in the lab.

May 2025 · United Kingdom

Operated live in a neutron beam.

SK-RAFT ran during a real radiation campaign at ISIS ChipIR, a facility built to test chips with atmospheric-like neutrons.

Technology readiness
TRL 8
1 · Idea9 · In service
Pre-seed
€300k

From Corallia Ventures, now a shareholder in SOLIDKOSMOS.

Winner · 2025

ESA EPIC European–Australian Space Startup Competition

Incubated

ESA BIC Greece alumni

We completed the European Space Agency's business incubation programme in Greece.

Since 2024

First spin-off of the University of Piraeus

Founded out of the Embedded Systems Laboratory (ESLab).

Backed by
Spin-off of
Alumni of
Member of
Member of
Member of
Reliability engineering

We test for bit flips. We also design for them.

Our founders have more than 15 years each in fault-tolerant computing, FPGAs and space systems. Bring us in when you need the expertise as well as the tool.

Test

Fault-injection campaigns

Experiment design and fault-injection campaigns on your design, run by our team with SK-RAFT.

Test

Radiation testing campaigns

End-to-end radiation testing for FPGA applications, from facility access to the final report.

Analyse

Radiation-report analysis

We analyse beam-test results and estimate the reliability of your design on its target device.

Analyse

Dependability assessment

System-level reliability analysis, including FTA, FMECA and FDIR strategy design for safety-critical embedded systems.

Design

Designs that tolerate bit flips

Mitigation for COTS SoC FPGAs, drawing on our ESA work on lockstep-based protection against single-event effects.

Design

Embedded software & acceleration

FPGA hardware acceleration and embedded software development for safety-critical systems.

Pilot phase

Try SK-RAFT on your own design.

We are inviting teams who build FPGA-based systems to use SK-RAFT on their real designs.

Pilot Limited places

The full version of SK-RAFT, free for a short time, for teams with a real project. We have a small number of pilot places.

Free trial For everybody

A limited version of SK-RAFT, so you can see how it works. We email you the link.

What would you like?
A few lines: the application, where it will operate, and your timeline.
We use these details to answer your request and, if you take part, to run the pilot or send the trial. See our privacy notice.