We flip bits in every memory of the chip.
The configuration memory holds the design. The application memories hold the data while it runs: flip-flops, BRAM and LUTRAM. Many tools only flip bits in the configuration memory. SK-RAFT does both.
Tested on EarthTrusted in Orbit
SK-RAFT injects radiation-induced bit flips into real FPGAs, right from your desk.
LEO → GEOSatellites & space systems
Aviation altitudeAircraft & avionics
On the roadAutomotive
On the groundData centers
Radiation from space can flip a bit inside a chip: a 0 becomes a 1. Nothing breaks and nothing warns you.
In SRAM-based FPGAs the configuration memory is the circuit itself. One upset can quietly rewire part of your design and stay there until it is detected and repaired.
Radiation beam testing remains essential, but beam time is scarce and very expensive. Find which bits affect your design early and keep it to a minimum.
Circuit open. The switch opens and the connection is cut. Logic B gets nothing, and the chip gives no warning.
The atmosphere and Earth's magnetic field hold most particles back, but not all. Bit flips happen on the ground, more often at aviation altitude, and far more often in orbit. That affects data centers, cars, aircraft and satellites alike.
No protection from Earth at all.
Far more bit flips in orbit, for every satellite that has to keep working for years.
Less atmosphere above the aircraft means more bit flips in its avionics.
Neutrons reach the ground too. Bit flips happen in data centers and in cars.
The bars show how much the atmosphere and Earth's magnetic field protect each altitude.
SK-RAFT is an FPGA-in-the-loop EDA tool. It injects the same bit flips that radiation causes, straight into your design, so you can find the bits that matter, prove your mitigation works, and make your design more reliable.
The configuration memory holds the design. The application memories hold the data while it runs: flip-flops, BRAM and LUTRAM. Many tools only flip bits in the configuration memory. SK-RAFT does both.
SK-RAFT can flip only the essential bits, or only the bits in one area of the chip (a Pblock) or in one component of your design. That saves a lot of test time.
Over the same USB cable (JTAG), SK-RAFT sends inputs to your design and reads its outputs. You see the effect of each bit flip at once.
Control SK-RAFT with Python API scripts. Other languages can be supported through its gRPC interface. No hardware modification and no change to your design.
| Typical tools | ||
|---|---|---|
| Configuration memorythe circuit itself | Yes | Yes |
| Flip-flops, BRAM, LUTRAMthe data while it runs | Rarely | All of them |
| Only the bits that matteressential bits, one area, one component | Sometimes | All three |
| Talk to your designinputs in, outputs out, during the test | Extra setup | Same USB cable |
| Changes to your designto run a campaign | Often extra IP | None |
| Automationfits your test setup | Tool-specific | Python API · gRPC |
Typical tools: common FPGA fault-injection approaches as publicly documented. Want a comparison with a specific tool? Ask us.
| Beam test only | ||
|---|---|---|
| Where | A facility abroad | Your own desk |
| Start | Weeks or months for a slot | Today |
| Beam-time fees | Very high | None |
| Which bit flips | Random | You choose |
| Same fault again | Not possible | Every time |
| Effect of each flip | Hard to trace | Seen at once, logged |
| Final qualification | Still required | Makes it short and targeted |
Beam testing stays essential for final qualification. SK‑RAFT finds the bits that matter first, so the time you book in the beam is short and targeted.
This is where SK-RAFT is built and used: fault-injection campaigns on AMD-Xilinx development boards, in our lab.





SK-RAFT ran during a real radiation campaign at ISIS ChipIR, a facility built to test chips with atmospheric-like neutrons.
From Corallia Ventures, now a shareholder in SOLIDKOSMOS.
We completed the European Space Agency's business incubation programme in Greece.
Founded out of the Embedded Systems Laboratory (ESLab).
Our founders have more than 15 years each in fault-tolerant computing, FPGAs and space systems. Bring us in when you need the expertise as well as the tool.
Experiment design and fault-injection campaigns on your design, run by our team with SK-RAFT.
End-to-end radiation testing for FPGA applications, from facility access to the final report.
We analyse beam-test results and estimate the reliability of your design on its target device.
System-level reliability analysis, including FTA, FMECA and FDIR strategy design for safety-critical embedded systems.
Mitigation for COTS SoC FPGAs, drawing on our ESA work on lockstep-based protection against single-event effects.
FPGA hardware acceleration and embedded software development for safety-critical systems.
We are inviting teams who build FPGA-based systems to use SK-RAFT on their real designs.
The full version of SK-RAFT, free for a short time, for teams with a real project. We have a small number of pilot places.
A limited version of SK-RAFT, so you can see how it works. We email you the link.